An 8-channel DSP With Adaptive Balance Filters For Analog Subscriber Lines

A digital signal processor for analog subscriber lines serving 8 channels is completely digital and provides the potential to shrink the design easily. The chip is 35mm' and a lµm CMOS DLM, SLP process is used. The device typically consumes 250mW running at 16.384MHz with a 61ns cycle time. The DSP performs all the digital signal processing necessary to fulfill the transmission requirements from all markets. Functions included are decimation, interpolation, PCM-filtering, PCM encoding/decoding, impedance and balance generation. Ring trip and adaptive balance are additional functions on the chip.