Electrical characteristics of 0/spl deg///spl plusmn/45/spl deg//90/spl deg/-orientation CMOSFET with source/drain fabricated by various ion-implantation methods

Electrical characteristics of 0/spl deg///spl plusmn/45/spl deg//90/spl deg/-orientation 0.5 /spl mu/m CMOSFETs with source/drain regions fabricated by three ion-implantation methods were discussed. For an asymmetrical one-sided 7/spl deg/-implantation method, large device orientation dependent fluctuation and asymmetry were observed in saturation drain current I/sub D/ and maximum substrate current I/sub B/ of both n- and p-MOSFETs/threshold voltage V/sub T/ of p-MOSFETs, and in I/sub D/ of n-MOSFETs/I/sub B/ of both n- and p-MOSFETs, respectively. However, almost comparable data were obtained for symmetrical 0/spl deg/-implantation and 7/spl deg//spl times/4-implantation methods. The symmetrical 7/spl deg//spl times/4-implantation method was most preferable to obtain symmetrical electrical characteristics for use in LSIs, because of high punchthrough immunity in scaled CMOSFETs.