Enhanced large-signal stability and performance in digital PID control in a DC-DC boost converter

The design of PID control in a boost converter, using linear small-signal models, often results in much restricted closed-loop bandwidth and stability margin, particularly in presence of the right-half-plane zero in the control-to-output transfer function. This paper attempts to enhance large-signal stability region and transient performance beyond linearization using phase-plane geometry. A first-order switching surface is considered during a large-signal recovery, which represents PD control in a current mode controlled boost converter with normalized load current feed-forward. This achieves improved load regulation, output impedance, and transient performance. Thereafter, a fixed gain discrete-time integral action is initiated (after reset) for further reduction in steady-state error. A boost converter prototype is fabricated, and test results are obtained using a FPGA device. The proposed architecture provides flexibility of tuning PID control based on phase-plane geometry, with possibility of achieving near time optimal transient recovery.