A 10-Gb/s 6-Vpp differential modulator driver in 65-nm CMOS

A 10-Gb/s 6-V
_pp
differential Mach-Zehnder modulator driver is implemented in 65-nm CMOS technology. The proposed modulator driver adopts a triple-stacking topology with a dynamic biasing to generate the differential voltage swing of six times as much as the nominal supply. The modulator driver occupies only 0.04 mm
²
without using inductors for area efficiency. The measurement results show an operating speed up to 10 Gb/s when electrically measured. The power consumption of this modulator driver is 98 mW which is lower than that of other modulator drivers exhibiting more than 6-V
_pp
swing.