A clockless, multi-stable, CMOS analog circuit

A CMOS analog circuit topology is presented that provides a number of stable operating points based on a laddered inverter quantizer (LIQAF) circuit. An input voltage sets the initial voltage state value when a CMOS transmission gate is turned on, and the voltage state then settles to the nearest stable operating point once the CMOS transmission gate is turned off. The proposed analog circuit achieves its stable operating levels through nonlinear, continuous-time feedback with a circuit that requires only a single supply voltage. An IC prototype demonstrates a 10-level version of the multi-stable circuit with an area of 0.015mm
²
in 0.18μm CMOS and current consumption of 300μA at 1.4V and <;45μA at 1V supply for a pair of the multi-stable circuits.