Total dose hardness of three commercial CMOS microelectronics foundries

We have measured the effects of total ionizing dose (TID) on CMOS FETs, ring oscillators and field-oxide transistor test structures fabricated at three different commercial foundries with four different processes. The foundries spanned a range of integration levels and included Hewlett-Packard (HP) 0.5 /spl mu/m and 0.8 /spl mu/m processes, an Orbit 1.2 /spl mu/m process, and an AMI 1.6 /spl mu/m process. We found that the highest tolerance to TID was for the HP 0.5 /spl mu/m process, where the shift in NMOS threshold voltage was less than 40 mV at 300 krad. An examination of the dependence of the threshold voltage shift on gate oxide thickness indicated that oxides of the different commercial processes were of similar quality, and that the improvement in the total dose tolerance of the HP 0.5 /spl mu/m technology is associated with the scaling of the gate oxide. Measurements on field-oxide transistors from the HP 0.5 /spl mu/m process were shown not to invert for signal voltages at 300 maintaining the integrity of the LOCOS isolation. Impact of these results is discussed in terms of the potential insertion of commercial microelectronics into space systems.