A digital centric CMOS RF transmitter for multistandard multiband applications

This work presents a digital centric transmitter in a 65nm CMOS technology. The transmitter contains an RF-DAC frontend, a 3.2 Gbps interface, a fractional resampling pulse shape filter (PSF), LO feedthrough- and IQ-phase/gain-mismatch compensation. The PSF converts the XTAL based baseband clock to the independent LO clock domain. The 9 bit RF-DAC frontend occupies 0.18 mm
²
. The SSB sinusoid output power of the transmitter frontend reaches 11.9 dBm at 2.4 GHz. The transmitter system fulfills all WLAN requirements at 2.4 GHz ISM band with an output power of 0.5 dBm and a power dissipation of 92.6 mW. It also enables WCDMA and LTE transmission, resulting in 4.7 dBm/89mW in WCDMA mode and 2.5dBm/86.7mW in LTE mode respectively. In all cases the proposed design meets all ACLR requirements.