Cryogenic small-signal and noise performance of 32nm SOI CMOS

The noise performance of a 32 nm SOI CMOS process is systematically studied for ambient temperatures in the range of 6-293 K. For a fixed transconductance bias, an order of magnitude improvement in calculated T
_min
is observed by cooling from room temperature to 6 K. This improvement is largely attributed to improvements in the device resistances as well as the reduction in thermal noise associated with cooling.