Radiation hardness of the CLARO-CMOS, a prototype ASIC for low power and fast single-photon counting in 0.35 micron CMOS technology

The CLARO-CMOS is a prototype ASIC primarily designed for single-photon counting with multi-anode photomultipliers (Ma-PMTs), that found applications also in the read-out of silicon photomultipliers (SiPMs) and microchannel plates (MCPPMTs). The chip allows fast photon counting up to 40 MHz, with a power consumption of less than 1 mW per channel. The prototype is realised in a 0.35 micron CMOS technology. In the LHCb RICH environment, over ten years of operation at the nominal luminosity for the upgrade, the ASIC must withstand a total fluence of about 6×10
¹²
1 MeV neutron equivalent cm
^-2
and a total ionising dose of 400 krad. We present the results of multi-step irradiation tests with neutrons and with X-rays up to the fluence of 10
¹⁴
cm
^-2
and 4 Mrad, respectively, including measurement of single event effects during irradiation and the evaluation of chip performance before and after each irradiation step.