A comparison of high-efficiency UHF RFID rectifiers using internal voltage compensation and zero-threshold-voltage MOSFETs

This paper discusses and compares the design of two high-efficiency 4-stage voltage-doubler UHF RFID rectifier operating at 915 MHz. The first rectifier uses conventional 180-nm CMOS transistors applying a technique of internal cancellation in order to compensate the high value of their threshold voltages (V
_th
). The second proposed rectifier uses zero-V
_th
transistors, which are available in a 130 nm CMOS process, eliminating the need for compensation circuitry. The circuit implementing V
_th
compensation occupies a 0.025 mm
²
area, achieving a -12 dBm input sensitivity and a 18% power conversion efficiency (PCE) when supplying a 1.2 V output voltage and a 10 μA load current. For the same load conditions, the circuit including zero-V
_th
transistors presents a reduced area occupation (0.013 mm
²
), while providing both improved sensitivity (-14.3 dBm) and a 33% PCE at this sensitivity.