OVSF code generator for 3G wireless transceivers using Xilinx System Generator

The Orthogonal variable spreading factor (OVSF) codes were first introduced for 3G standards. The OVSF are channelization codes are widely used for preserving the orthogonality between physical channels in a communication system. They become essential for increasing system capacity as well as to provide multiple data rates for supporting different bandwidth requirements. This scheme is known as OVSF-CDMA. This paper presents the hardware co-simulation realization of parameterized OVSF code with classical counter based approach using Xilinx System Generator software tools. The OVSF code is first modeled in MATLAB Simulink based system generator using Black box in VHDL for delay synthesis, timing analysis and validating for software testing as per required standard for WCDMA i.e. TCHIP is 260ns or FCHIP 3.84 MHz. The claimed result i.e. 2ns can meet the time specification of desired standards. The target FPGA device is Virtex-5 (XC5VLX50T-1ff1136).