Contriving of a novel BIST (built in self-test) digital combinational lock

This paper presents the design of digital combinational lock by using Finite State Machine. The digital combinational lock presented in this paper is equipped with advanced features wherein the user can set the combination of his or her choice “n” number of times. The inclusion of built in self testing (BIST) capabilities in the present system helps user to determine the lock condition. The source code of the digital combinational lock has been written in Verilog HDL and the designing has been done in Xilinx ISE.