Exploring the design of ultra-low energy global interconnects based on spin-torque switches

Emerging spin-torque phenomena, like Spin Hall Effect (SHE), may lead to high-speed, low-voltage current-mode switches based on nano-scale magnets. In this work we propose and analyze the application of such spin-torque switches in the design of energy-efficient and high-performance current-mode on-chip global-interconnects. Simulations show the possibility of achieving up to two order of magnitude higher energy-efficiency as compared to conventional CMOS techniques, for optimal spin-device parameters. A case study for on-chip MRAM cache simulation shows ~90% reduction in energy for on-chip memory access, using the proposed interconnect design.