60 GHz On-chip loop antenna integrated in a 0.18 µm CMOS technology

This paper describes the electromagnetic (EM) field analysis of a 60 GHz on-chip loop antenna integrated in a 0.18 µm CMOS Technology. The simulation was compared with the measurement. The reflection coefficient showed good agreement between simulation and measurement by assuming a conductive layer of about 1 µm in the simulation. The radiation efficiency is calculated and it was found that the radiation efficiency can be improved by reducing conductivity of the silicon substrate. The radiation efficiency of 82.6% can be achieved if conductivity is less than 0.1 S/m.