Hardware architecture of a unified embedded engineering learning platform

This paper presents a hardware architecture of a unified embedded engineering learning platform, based on FPGA. Development platform is designed to perform laboratory exercises related to various interfaces connected to FPGA and peripherals that are found on the platform. This platform is created as universal and can be used for several courses in the area of digital and computer system design. It is possible to access the platform via the internet, using a server that is located in the laboratory, connected to the platform. Over the mezzanine connector, base board can communicate with additional boards which gives additional possibilities for exercises.