A 0.6-V 336-μW 5-GHz LNA using a low-voltage and gain-enhancement architecture

In this paper, a g
_m
-boosted low-noise amplifier (LNA) with a low-voltage architecture is proposed to enhance gain and noise performance under low-power operation. It is designed at 5-GHz using 0.18-μm CMOS process. By employing current-reused, and forward-body-bias techniques, LNA can operate at a reduced supply voltage with micro-watt dc power consumption. In addition, g
_m
-boosted topology using transformer-coupling is added to the LNA to further improve gain and to reduce noise factor simultaneously. Based on aforementioned techniques, the 5-GHz LNA presents a gain of 10.0 dB and a noise figure of 4.8 dB at 4.8 GHz. Under a supply voltage of 0.6 V, the dc power consumption is 336 μW.