Suppression of threshold voltage shift for normally-Off GaN MIS-HEMT without post deposition annealing

In this paper, we present a method of reducing threshold voltage shift for normally-off GaN MIS-HEMT by the optimization of dielectric deposition conditions. High-temperature deposition of Al
₂
O
₃
insulator decreases the impurities in a dielectric film, leading to small C-V and I-V hysteresis under large positive gate voltage operation. Moreover, Al
₂
O
₃
deposited at high temperature achieve high quality interface and bulk without post deposition annealing (PDA), preventing the degradation of electrodes and crystallization of insulator film. The fabricated device shows small C-V and I-V hysteresis, with a breakdown voltage of greater than 600 V.