Design of a dual-mode 1.8 V 62 uW CMOS sensor interface for inkjet-printed sensor

This paper presents the design of a dual-mode (direct/differential) switched-capacitor (SC) interface system for an inkjet-printed capacitive sensor. The proposed system consists of a single-stage SC capacitance-to-voltage (C2V) converter and a 10-bit successive approximation register (SAR) ADC. The specifications of C2V are optimized at system level, emphasizing the C2V operation followed by the data converter. Cascade amplification is avoided to simplify the front-end. Both reference capacitor and feedback capacitor are calibrated to match the required value with 25 fF step. Correlated double sampling (CDS) technique attenuates the DC offset and flicker noise. Gain-boosting amplifier is adopted to improve linearity with low feedback factor. The 10-bit capacitive cascaded-binary-weighted (CBW) digital to analog converter (DAC) makes up the charge redistribution converter and achieves a balance between area, power and accuracy. Self-timing SAR logic uses extra half cycle and relaxes the settling time of pre-amplifiers. The entire interface system operates at 46 kHz sampling rate with 62 uW power consumption. Post layout simulation results show 3.5 mLSB integral non-linearity (INL) at the output of C2V and 9.9 bit ENOB of ADC. The active core area is 0.6mm
²
.