Novel millimeter-wave PLL synthesizer with cascaded phase detectors

We present a novel millimeter-wave PLL architecture with cascaded phase detectors. It exhibits low phase noise and low spurious characteristics concurrently. The 79-GHz band PLL synthesizer was developed in 65-nm CMOS technology. It achieves a phase noise of -90.0 dBc/Hz at 1 MHz offset and a normalized phase noise of -231.2 dBc/Hz
²
at 1 MHz offset using a 49-MHz on-chip reference oscillator. The PLL exhibits low-level reference spurs of -29.3 dBc at 49 MHz and -36.0 dBc at 98 MHz.