A +32.8 dBm LDMOS power amplifier for WLAN in 65 nm CMOS technology

Generating high output power at radio frequencies in CMOS becomes more challenging as technology is scaled. Limitations mainly come from device design. We demonstrate the feasibility of an 10 V LDMOS device fabricated in 65 nm foundry CMOS technology with no added process steps or mask. DC, RF, and power characterization are presented which show the feasibility of the device. The LDMOS device is used in an integrated WLAN-PA design and 32.8 dBm linear output power in the 2.45 GHz band is achieved. Load-pull data also shows high output power capability at 5.8 GHz. The concept can also be used at 45 nm and 28 nm nodes in most foundry CMOS processes.