A 1.5 V CMOS high-speed 16-bit/spl divide/8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI

Based on a 0.8 /spl mu/m CMOS technology, the speed performance of this 16-bit/spl divide/8-bit divider circuit is improved by 45% as compared to the divider using the non-restoring iterative architecture and the domino dynamic logic circuits without the bootstrapped technique.