FPGA based implementation and testing of OVSF code

The orthogonal variable spreading factor (OVSF) code is widely used for preserving the orthogonality between physical channels. They provide multiple data rates for supporting different bandwidth requirements in a communication system. As the Penetration of FPGA devices is increased because of its reusability and less time to market, still impracticality exists for attaching test equipment probes to such devices under test. The Xilinx ChipScope™ Pro tool provides the integration of logic analyser and other test and measurement hardware components as a software core with the targeted design. This paper presents the hardware realization of parameterised OVSF code with classical counter based approach and its testing on FPGA using Xilinx ChipScope Pro software tools. The OVSF generation is first modelled in MATLAB Simulink and then implemented in VHDL for delay synthesis, timing analysis and validating for software testing as per required standard for WCDMA i.e. TCHIP is 260ns or FCHIP 3.84 MHz. The target FPGA device is Virtex-5 (XC5VLX50T-lff1136).