Y-Band On-Chip Dual Half-Width Leaky-Wave Antenna in a Nanoscale CMOS Process

We present a Y-band on-chip half-width leaky-wave antenna for the integrated subterahertz transceiver in a 65-nm digital CMOS process. By utilizing the traveling-wave antenna characteristic, the proposed half-width microstrip leaky-wave antenna (MLWA) structure is concurrently matched to the Rx and Tx, relieving aperture size restriction due to the chip area constraint, while obviating the need for an explicit TR switch. The proposed transceiver (TRx) dual antenna achieves more than 30 GHz of bandwidth (BW),
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4.9 dBi of maximum antenna gain, and 26.3% of radiation efficiency at 245 GHz in simulation and measures
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5 dBm of maximum equivalent isotropically radiated power (EIRP) with the extremely thin antenna substrate less than 6
$\mu$
m.