Extraction of series resistance on junctionless and inversion-mode nanowire FET through the method based on Y-function

In the devices with nanowire channel, series resistance is an important parameter. As the channel length is scaled down, channel resistance is gradually small and it has therefore become an important issue to keep the value of series resistance smaller than channel resistance in order to ensure the device performance. Moreover, the series resistance fluctuates in the devices; it is mainly due to its three dimensional contact configuration between the source/drain and channel. Due to these reasons, therefore, it is important to extract the series resistance and to examine its behavior in terms of appropriate device parameters and the complexity of contact configuration. Recently, the junctionless nanowire transistor (JNT) is spotlighted due to its high on/off ratio, excellent gate controllability through multiple-gate structure, the immunity of short channel effect such as DIBL and threshold voltage roll-off, and the extremely simple fabrication process. Although many studies have been carried out for the JNT, the research on the comparative analysis of the series resistance of between the JNT and the inversion mode nanowire FET was not performed yet. In this paper, we demonstrated and compared the extracted series resistance between fabricated JNTs and inversion mode nanowire FET (IMN-FET) through the method based on Y-function. This technique provides to extract the series resistance of both devices obviously and accurately. The observed data are discussed based on the existing theories.