Pseudorandom Number Generator based on the Residue Number System and its FPGA implementation

In this paper a novel Pseudorandom Number Generator is presented. It is based on the Residue Number System (RNS), which allows us to design a very fast circuit that has a very different way of operating with respect to other generators. A set of different tests is used to determine the quality of the performance of the proposed generator. Results are shown for an FPGA implementation of the proposed generator.