Design and simulation of ESD-resistant ICs

Robustness of modern ICs during system assembly and normal operation requires that protection circuits are built-in to prevent damage to internal circuit elements due to Electrostatic Discharge events (ESD), which can inject substantial energy into the chip. ESD protection as well as protection against other damaging events, such as latchup, is highly dependent on chip architecture and circuit design, electrical properties of interconnects and parasitic devices, and of course device design and semiconductor process technology.