Thermal effect on die warpage during back-side die polishing of flip-chip BGA device

Back-side die polishing for thinning silicon uniformly to less than 100 µm is challenging due to sample warpage issues. A novel method involving back-side die polishing at elevated temperature has been used to minimize warpage of the sample during the actual milling process. The optimized process achieves highly uniform silicon thickness across the whole die. High-resolution laser images can be obtained across the samples at the same focal length, thus greatly improving the capability and accuracy of electrical fault isolation necessary for advanced devices.