A sample preparation technique to reveal the implant profile by TEM for IC failure analysis

In the TEM image of a MOS device prepared by the traditional TEM sample preparation method, the junction profile cannot be displayed. In this paper, a TEM sample preparation technique was introduced to directly observe the junction profile by TEM. Using this technique, the junction profiles of LDD and Source/Drain of a MOS device can be clearly displayed in the TEM images. To demonstrate the application of this technique in failure analysis, case studies about the implant issue induced device fail were also reported.