Design of multi-stage cascaded integrator comb filter using single adder and subtractor

Cascaded Integrator Comb (CIC) filter is a special class of linear phase FIR filter that does not require any multiplier. They are generally used in multirate systems with large sampling conversion factors. Although CIC structure is a hardware efficient means of constructing interpolating or decimating filter, as the number of stages of the filter increase, the required hardware also increases. In this paper we present a programmable three stage CIC decimator filter with reduced hardware components as compared to the conventional CIC filter. It is shown that one adder and one subtractor with few combinational gates can be used to develop a three stage CIC filter. We propose two architectures that reduce the adder/subtractor in subsequent stages: one with tri-state buffers and another with multiplexer. It is found that a significant amount of hardware gates can be reduced by proper channeling of datapath using multiplexer or tri-state buffers aided with proper clock sequences. The same logic can be used to build CIC filter with higher stages using one adder and one subtractor. The architectures are verified by post-synthesis simulation and the corresponding results along with output waveforms are provided to justify its validity.