Abstract:
To attain high bandwidth communication between chips at lower power consumption, silicon interposers with dense metallization and through-silicon vias (TSVs) have been wi...Show MoreMetadata
Abstract:
To attain high bandwidth communication between chips at lower power consumption, silicon interposers with dense metallization and through-silicon vias (TSVs) have been widely explored. However, TSV electrical losses increase as TSV height increases and are generally high in low-resistivity silicon. To alleviate this issue, we demonstrate a silicon interposer technology featuring photodefined polymer embedded vias. High-frequency measurements are performed for the fabricated polymer-embedded vias, yielding approximately 1 dB insertion loss at 50 GHz.
Date of Conference: 28-31 May 2013
Date Added to IEEE Xplore: 08 August 2013
ISBN Information: