A Systematic Approach for Implementing Fractional-Order Operators and Systems

In this paper a generalized class of fractional-order systems is realized in digital hardware using a low-cost field programmable gate array (FPGA) device. First, fractional-order derivatives and integrals are realized in fixed-point hardware, wherein each coefficient and signal is represented with a custom number of bits. Both shift-form and delta-form structures are used for discretization, and are combined in the digital hardware realization to achieve a desired accuracy with low hardware cost. A methodology is then developed to construct general fractional-order transfer functions using the fractional-order derivatives and integrals as building blocks, in the same way that their integer-order counterparts are used in an integer-order system. Three systems are presented to illustrate the methodology using partitioned-form and feedback-form realization structures; the hardware results verify that the high-speed realizations achieve the desired accuracy with a low-cost solution.