A comparison of state-of-the-art efficiency enhancement techniques of fully integrated CMOS power amplifiers for handset LTE applications

Among the significant remaining challenges of complete transceiver integration for handset applications is the implementation of high-efficiency power amplifiers (PA) in CMOS. This challenge is exacerbated by the high crest factors of the signals utilized in WCDMA and LTE standards. The first aim of this paper is to identify the shortcomings of the traditional efficiency enhancement techniques in dealing with LTE in CMOS. In addition, an investigation of state-of-the-art implemented efficiency enhancement methods is performed. Moreover, a comparative overview of the aforementioned techniques is presented to provide guidelines for high-efficiency CMOS LTE PA. This is accomplished while identifying the bottlenecks for the future LTE upgrades. Finally, the performances of the investigated techniques for CMOS are compared with other technologies to assay the commercial suitability of CMOS PA for LTE.