Low-power and compact NP dynamic CMOS adder with 16nm carbon nanotube transistors

Low-power, compact, and high-performance NP dynamic CMOS circuits implemented with a 16nm carbon nanotube transistor technology are presented in this paper. The performances of two-stage pipeline 32-bit carry lookahead adders are evaluated with two circuit techniques: the carbon nanotube MOSFET (CN-MOSFET) domino logic and the CN-MOSFET NP dynamic CMOS. While providing similar propagation delay, the total area of CN-MOSFET NP dynamic CMOS circuit is reduced by 13.61% as compared to the CN-MOSFET domino adder. Miniaturization of the CN-MOSFET NP dynamic CMOS adder reduces the dynamic switching power consumption by 30.42% as compared to the CN-MOSFET domino circuit. Furthermore, the CN-MOSFET NP dynamic CMOS circuit provides 49.32% savings in leakage power consumption as compared to the CN-MOSFET domino adder.