Monolithic pixel sensors for fast particle trackers in a quadruple well CMOS technology

The Apsel4well monolithic active pixel sensor (MAPS) chip prototype is meant as an upgrade solution for the Layer0 of the SuperB silicon vertex tracker. The design is based on a 180 nm CMOS process with quadruple well called INMAPS. This technology makes it possible to overcome the main drawbacks related to three transistors MAPS. Moreover, the presence of a high resistivity epitaxial layer is expected to lead to further improvements in terms of charge collection performance and radiation resistance. This paper, after giving some hints on the INMAPS process, focuses on the analog front-end section of the pixel readout chain. Measurement results on the main analog channel performance, like charge sensitivity and equivalent noise charge, are given along with charge collection efficiency evaluation through laser stimulation. These last characterization data were also used for validating TCAD simulation results of the sensor charge collection performance. Finally, results from a neutron irradiation campaign performed with fluences up to 2.7 × 10
¹³
1 MeV neutron equivalent/cm
²
will be shown and compared with the outcome of a Monte Carlo charge loss model of the structure useful for the rad-harder design of the next quadruple well MAPS.