Tunnel transistors for energy efficient computing

Tunnel transistor (TFET) is a potential steep slope device enabling supply voltage scaling. TFET is explored at the device and circuit level. Hetero-junction TFET is demonstrated with high drive current and high on-off current ratio. Hetero-junction TFETs with scaled device geometry can outperform Si FinFET at V
_cc
<;0.3V. Design considerations of TFET based circuits for logic and SRAM applications are investigated and performance benchmarked with Si FinFET technology.