Implementation of high-throughput FFT processing on an application-specific reconfigurable processor

To meet the increasing requirements on both high-performance and high-flexibility for modern communication applications, this paper presents a novel Application Specific Reconfigurable Architecture called ASRA that tightly integrates a custom reconfigurable core with a very-long instruction word (VLIW) basic core. ASRA uses clustered register files and the two parts can work in parallel. The reconfigurable core used to execute multi-grained custom instructions offers improved performance by hardware acceleration for critical computation task, and the basic core for general instructions provides enough flexibility. The run-time context manager can dynamically select and bind custom instructions to appropriate reconfigurable fabrics while considering run-time changing scenarios. As a case study, we exploited variable-length and high-throughput fast Fourier transformation (FFT) processing which is a kernel data processing task in communication systems on ASRA processor. Using fast scratchpad memory and reconfigurable port-binding mechanism, we pipeline read/write operation and butterfly operation and connect them to support hardware pipeline execution of the loop kernel. Experiment results show that ASRA achieves a high performance improvement and a good flexibility.