A Novel Isolation Method for Half-Bridge Power ICs

A novel integrated solution for two high voltage power n-channel MOSFET transistors (NMOSTs) M
_H
and M
_L
and two level-shifting high-voltage NMOSTs M
₁
and M
₂
are proposed to save chip area and reduce process complexity. The optimized variation lateral doping technique is used for designing the four NMOSTs. The four NMOSTs are isolated by PN junction isolation technique to integrate together. The isolation areas between M
_L
and M
₁
and M
₁
and M
₂
are needed to sustain high voltage in
X
-direction. Hence, the effective surface charge density distribution in the isolation areas is designed almost the same as the NMOST. The layout area of the two level-shifting high-voltage NMOSTs of the proposed solution is only 6.61% of that conventional one. The simulation results from TCAD MEDICI and DAVINCI show that the expectant functions are well achieved.