Realization of logic gates using Cmos Gilbert multiplier cell

Realization of logic gates using CMOS Gilbert multiplier cell is introduced. Power series expression of logic functions are implemented using Gilbert multiplier cell and pool circuit. To illustrate the proposed technique a circuit for simultaneous realization of logic functions NOT, AND, OR, XOR, NAND and NOR is considered. PSPICE simulation results with ±5V power supplies are given to demonstrate the feasibility of the proposed circuit. The proposed circuit is expected to be useful in analog digital and integrated circuits.