Stress minimization in deep sub-micron full CMOS devices by using an optimized combination of the trench filling CVD oxides

We have found that the defect generation which is induced by the mechanical stress during the densification, depends on the ratio of the trench filling material composed of the TEOS-O/sub 3/ based CVD oxide with tensile stress and the plasma enhanced CVD oxide with compressive stress. The lower as-deposited stress is, the lower the maximum stress during the densification is. This stress level is proportional to the defect density which is generated in fabricating MOSFETs with Shallow Trench Isolation (STI). In order to achieve devices without a defect, it is important to minimize as-deposited stress level by optimizing the ratio of the trench filling CVD oxides.