A novel switched-capacitor four-quadrant analog multiplier-divider and some of its applications

The design of a novel, general-purpose, MOS switched-capacitor (SC multiplier-divider based on the time-division concept is described. The (multiplier-divider) circuit has been implemented using only CMOS switches, 3 operational amplifiers, capacitors, and a logic inverter gate without any other electronic components. The transfer characteristic υ
0
= υ
x
υ
y
/υ
w
of this circuit is only dependent upon external voltages and the ratio of capacitors. An experimental circuit has been built and tested. The results are in close agreement with theoretical predictions. Applications of this circuit to a root mean-square measuring device and a frequency multiplier are also presented.