Image Enhancement Algorithms using FPGA

Image enhancement techniques can be classified into two categories as spatial domain and frequency domain. This paper presents hardware implementation of a five image enhancement algorithms in spatial domain using FPGA technology. These algorithms are: median filter, contrast stretching, histogram equalization, negative image transformation and power-law transformation. All algorithms are studied and hardware circuits are realized for them. Then hardware is modeled using Altera System and synthesized onto Cyclon III on Development kit (DE0) FPGA chip.