Power Loss and Switching Noise Reduction Techniques for Single-Inductor Multiple-Output Regulator

A new gate drive circuit to reduce the power loss and switching noise of single-inductor-multiple-output regulators is presented. Efficiency degradation and switching noise induced by the cross-talk of the voltages and currents within the power stage and buffer are analyzed. A shoot-through-current (STC) controlled buffer with four-transistor (4T) inverters is presented, and the 4T inverter enables internal STC control and generates two outputs with dead-time. To further isolate the cross-talk, two separate high voltage selectors (HVS) with the proposed buffer are used to power the buffer and the power P-MOSFET body, respectively. Simulation results show that the peak and average currents of the proposed buffer are smaller and much less sensitive to the buffer size than those of the traditional inverter based buffer. Two single-inductor-dual-output boost converters with and without the proposed techniques have been fabricated in a 0.35- μm CMOS process. Experimental results show that the maximum efficiency is increased from 87.8% to 91.6% with the proposed technique.