Tutorial T6B: ESD Design for Low Power SoCs

Summary form only given. The tutorial provides an introduction into the essential concepts of integrated circuit (IC) electro-static discharge (ESD) protection design and test methodology. The specific constraints and solution strategies for low power SoCs are highlighted and an overview of recently developed EDA verification approaches is given. In the second part the ESD protection is extended to system level ESD, and a feasible IC/PCB co-design approach also including EMC aspects will be presented at the example of mobile phone platforms. This tutorial is equally addressing mixed signal design as well as digital power planning. It additionally covers an important aspect of IC and printed circuit board co-design.