Design of low power Voltage Controlled Oscillator

This paper presents the design of low power Voltage Controlled Oscillator with differential stages. Circuit uses multiple pass loop architecture having primary and secondary (auxiliary feed forward) loops. In delay cell positive feedback is used with cross coupled regenerative PMOS load, due to that power consumption reduces. For best tuning range multiple delay path is used. Measurement shows that Oscillator has linear frequency voltage characteristics. This oscillator operates at 1.8V supply. After circuit designing, 2.17GHz-4.16GHz tuning rang, 2.57 GHz centre frequency with 3mw power consumption is obtained. Further to reduce power consumption of Voltage Controlled Oscillator, drain bulk connected PMOS load is used that works in sub-threshold region. If Bulk drain is connected it shows more linearity. By using Bulk drain connected transistor; Power Consumption reduces up to 165 μw and frequency is 1.6GHz with tuning range 1.13GHz-2.6GHz.