12 GHz monolithic double-balanced down converter in 65 nm CMOS

This paper presents a 12 GHz monolithic double-balanced down conversion mixer with IF buffer in a 65 nm CMOS technology. The mixer down converts the input signal at 12 GHz to IF frequency and together with the IF buffer achieves a conversion gain of 27.5 dB with ±0.6 dB variation across over 1 GHz band. The simulated in-band noise figure (NF) is about 14.6 dB and the in-band output third-order intercept point (OIP3) is about 6 dBm. The proposed down converter consumes 16 mA from a 1.2 V supply voltage. The die area of the whole circuit is only 0.2×0.22 mm
²
.