Thermal stress characteristics and reliability impact on 3-D ICs containing through-silicon-vias

Thermal stresses in TSV structures have been measured using micro-Raman spectroscopy and precision wafer curvature technique as a function of temperature and during thermal cycling. The results were verified by finite element analysis (FEA) to characterize the thermomechanical behavior of the TSV structures. An initial nonlinear curvature behavior was observed and was attributed to grain growth, which was followed by a linear and reversible behavior. The impact of thermal stresses on the keep-out zone (KOZ) for devices near the TSVs was investigated.