High-performance 0.07-μm CMOS with 9.5-ps gate delay and 150 GHz fT

We report room-temperature 0.07-μm CMOS inverter delays of 13.6 ps at 1.5 V and 9.5 ps at 2.5 V for an SOI substrate; 16 ps at 1.5 V and 12 ps at 2.5 V for a bulk substrate. This is the first room-temperature sub-10 ps inverter ring oscillator delay ever reported. PFETs with very high drive current and reduction in parasitic resistances and capacitances for both NFETs and PFETs, realized by careful thermal budget optimization, contribute to the fast device speed. Moreover, the fast inverter delay was achieved without compromising the device short-channel characteristics. At V
_DD
=1.5 V and I/sub off//spl sim/2.5 nA/μm, minimum L/sub eff/ is about 0.085 μm for NFETs and 0.068 μm for PFETs. PFET I/sub on/ is 360 μA/μm, which is the highest value ever reported at comparable V
_DD
and I/sub off/. The SOI MOSFET has about one order of magnitude higher I/sub off/ than a bulk MOSFET due to the floating-body effect. At around 0.07 μm L/sub eff/, the NFET cut-off frequencies are 150 GHz for SOI and 135 GHz for bulk. These performance figures suggest that subtenth-micron CMOS is ready for multi-gigahertz digital circuits, and has good potential for RF and microwave applications.