FPGA implementation of PSK modems using partial re-configuration for SDR and CR applications

The role of FPGAs in software defined Radios (SDR) and Cognitive radios (CR) are very significant. These radios have to load different waveform depending on their requirements which may use different source coding, channel coding and modulation schemes. The user has to load large bit files even for small changes in the waveforms. In SDRs and CRs the configuration time and current consumption plays significant role: for example, a virtex-7 FPGA takes 500ms to complete configuration. If the waveforms design is made Partially Reconfigurable then the configuration time and the Hardware usage can be saved. The Objective of this work is to make the Modulation and demodulation (PSK) Schemes partially reconfigurable. The paper describes the Design and Implementation of Phase Shift keying (PSK) Modulation and demodulation in FPGA using Partial Re-configuration (PR). This work involves the Design and implementation of BPSK, QPSK, 8-PSK and 16-PSK modulation and demodulation schemes in FPGA. The user can swap between different modulation and demodulation schemes during runtime by configuring a control register in FPGA. The Implementation of these PSKs shares a common hardware, which is the Static Part and there is a Dynamic part too. In the PR, the user has to load the bit stream for the Dynamic part only, and not the entire bit stream. This will be smaller in size compared to the large bit file. The modulator design consists of two DDS modules and the demodulator part consists of a four DDS modules, which forms the static part of the design. By designing the entire waveform using partial Reconfiguration, the waveform can be made as part of the Platform realized and the configuration time and power consumption can be very much reduced.