VLSI architectural design of zoomable real time spectrum analyzer

Spectrum analyzer is perhaps the most useful instrument that finds its application in almost every branch of engineering. In this work, a pipelined architecture of a hardware economic spectrum analyzer has been presented that incorporates the zooming capability with a nominal increase in the hardware complexity. Sliding window DFT algorithm has been chosen for this purpose and CORDIC (Coordinate Rotation Digital Computer) module has been employed for implementing the architecture. Due to the recursive nature of the algorithm, the error accumulates with number of iterations with time. To prevent accretion of the error beyond the limit of the required accuracy, the proposed architecture operates two parallel pipes simultaneously in a time skewed manner. External control is provided to select the level of zooming. The design is implemented on XILINX Spartan3 FPGA and tested up to two level of zooming for various real-time input signals.