Design and test of planar transformer using CMOS technology with BALUN applications

This paper presents design and test of a planar transformer using 0.18 µm CMOS technology with BALUN applications. To enhance the transformer coupling coefficient of the primary/secondary coil, the broadside-coupled structure is adapted while the circuit size is also minimized in chip area of 190 µm × 190 µm. The measured results based on the differential-/common-mode thru-reflect-line (TRL) calibration are shown and the associated transformer parameters including inductances and coupling coefficient are extracted. The additional BALUN application is performed as well in the frequency range of 1.6 GHz – 12 GHz.